diff options
| author | LIU Zhiwei <zhiwei_liu@c-sky.com> | 2020-07-01 23:25:11 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-07-02 09:19:33 -0700 |
| commit | f020a7a14505d6996497693e63331ab609847d93 (patch) | |
| tree | 248a28bb2a26088b03a212f1fd21828dcd7c6768 /target/riscv/insn32.decode | |
| parent | 2b587b335050dbc0cb3823758341f145c0375312 (diff) | |
target/riscv: vector integer merge and move instructions
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200701152549.1218-24-zhiwei_liu@c-sky.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/insn32.decode')
| -rw-r--r-- | target/riscv/insn32.decode | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 843c15f8fa..238aa014d1 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -71,6 +71,7 @@ @r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd @r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd @r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd +@r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd @r_wdvm ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd @r2_zimm . zimm:11 ..... ... ..... ....... %rs1 %rd @@ -402,6 +403,12 @@ vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm vwmaccsu_vv 111110 . ..... ..... 010 ..... 1010111 @r_vm vwmaccsu_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm vwmaccus_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm +vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2 +vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2 +vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2 +vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0 +vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0 +vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0 vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm vsetvl 1000000 ..... ..... 111 ..... 1010111 @r |