diff options
| author | Alistair Francis <alistair.francis@wdc.com> | 2021-04-01 11:17:48 -0400 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-05-11 20:02:06 +1000 |
| commit | d6f20dacea5147a9136ec3ecc7124440c16ba862 (patch) | |
| tree | 9ff8d89c91751b603ac3d74459be1e50f6931b25 /target/riscv/csr.c | |
| parent | 0e62f92eac4b906bda29e64ea8a8c1e72df0d302 (diff) | |
target/riscv: Fix 32-bit HS mode access permissions
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: cb1ef2061547dc9028ce3cf4f6622588f9c09149.1617290165.git.alistair.francis@wdc.com
Diffstat (limited to 'target/riscv/csr.c')
| -rw-r--r-- | target/riscv/csr.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 1938bdca7d..6a39c4aa96 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -181,7 +181,11 @@ static RISCVException hmode(CPURISCVState *env, int csrno) static RISCVException hmode32(CPURISCVState *env, int csrno) { if (!riscv_cpu_is_32bit(env)) { - return RISCV_EXCP_NONE; + if (riscv_cpu_virt_enabled(env)) { + return RISCV_EXCP_ILLEGAL_INST; + } else { + return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; + } } return hmode(env, csrno); |