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author | Peter Maydell <peter.maydell@linaro.org> | 2022-03-31 18:36:08 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2022-03-31 18:36:08 +0100 |
commit | d5341e09135b871199073572f53bc11ae9b44897 (patch) | |
tree | f516452876f8e37d9f3c75b7abdb59cd566f0d9b /target/riscv/csr.c | |
parent | cace6c6f3aca7b88afc42995f90bbefb37a0ed57 (diff) | |
parent | 7ceee3a19b31818e6f7c8e429e25b219aefa8dd6 (diff) |
Merge tag 'pull-tcg-20220331' of https://gitlab.com/rth7680/qemu into staging
Fix tcg/aarch64 buglet for Windows on ARM host (#947).
# gpg: Signature made Thu 31 Mar 2022 18:05:46 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20220331' of https://gitlab.com/rth7680/qemu:
tcg/aarch64: Use 'ull' suffix to force 64-bit constant
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/riscv/csr.c')
0 files changed, 0 insertions, 0 deletions