diff options
| author | Alistair Francis <alistair.francis@wdc.com> | 2021-04-24 13:33:18 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-05-11 20:02:07 +1000 |
| commit | 4fd7455bb39910c0730db66895328cd37b5cee5a (patch) | |
| tree | 6b206bc508ade207d502b77fd3da5093ce44a0c8 /target/riscv/cpu_bits.h | |
| parent | 994b6bb2db8d9d21207aa3a9991b9789c3d3d1ca (diff) | |
target/riscv: Remove the hardcoded MSTATUS_SD macro
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: fcc125d96da941b56c817c9dd6068dc36478fc53.1619234854.git.alistair.francis@wdc.com
Diffstat (limited to 'target/riscv/cpu_bits.h')
| -rw-r--r-- | target/riscv/cpu_bits.h | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index d738e2fdbd..6e30b312f0 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -368,16 +368,6 @@ #define MXL_RV64 2 #define MXL_RV128 3 -#if defined(TARGET_RISCV32) -#define MSTATUS_SD MSTATUS32_SD -#define MISA_MXL MISA32_MXL -#define MXL_VAL MXL_RV32 -#elif defined(TARGET_RISCV64) -#define MSTATUS_SD MSTATUS64_SD -#define MISA_MXL MISA64_MXL -#define MXL_VAL MXL_RV64 -#endif - /* sstatus CSR bits */ #define SSTATUS_UIE 0x00000001 #define SSTATUS_SIE 0x00000002 |