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authorAlistair Francis <alistair.francis@wdc.com>2020-08-12 12:13:44 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-08-25 09:11:36 -0700
commit83028098f45a08da209799aeea4801c362d0afeb (patch)
tree3b65c471babe0c783442b8eab679927b0eef61d1 /target/riscv/cpu_bits.h
parent30f663b16f81d862256c7c71bc909d4588924d8c (diff)
target/riscv: Support the v0.6 Hypervisor extension CRSs
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 644b6c114b1a81adbee0ab8c9c66a8672059ec96.1597259519.git.alistair.francis@wdc.com Message-Id: <644b6c114b1a81adbee0ab8c9c66a8672059ec96.1597259519.git.alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu_bits.h')
-rw-r--r--target/riscv/cpu_bits.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 573d85da41..d88e2ea30d 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -197,9 +197,12 @@
#define CSR_HIDELEG 0x603
#define CSR_HIE 0x604
#define CSR_HCOUNTEREN 0x606
+#define CSR_HGEIE 0x607
#define CSR_HTVAL 0x643
+#define CSR_HVIP 0x645
#define CSR_HIP 0x644
#define CSR_HTINST 0x64A
+#define CSR_HGEIP 0xE12
#define CSR_HGATP 0x680
#define CSR_HTIMEDELTA 0x605
#define CSR_HTIMEDELTAH 0x615