diff options
author | LIU Zhiwei <zhiwei_liu@c-sky.com> | 2022-01-20 20:20:38 +0800 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2022-01-21 15:52:57 +1000 |
commit | 40bfa5f6950afbec943353304fcd4367cc143548 (patch) | |
tree | c2e5dfb1ce3eaa6d6e4643f8b63ec9fffac5d7f8 /target/riscv/cpu.h | |
parent | 83b519b8a44d6b7d9b9d9763e7189061e116215d (diff) |
target/riscv: Create current pm fields in env
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220120122050.41546-12-zhiwei_liu@c-sky.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu.h')
-rw-r--r-- | target/riscv/cpu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 7657e22a56..6fe842edfd 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -266,6 +266,8 @@ struct CPURISCVState { target_ulong upmmask; target_ulong upmbase; #endif + target_ulong cur_pmmask; + target_ulong cur_pmbase; float_status fp_status; @@ -515,6 +517,8 @@ static inline uint32_t vext_get_vlmax(RISCVCPU *cpu, target_ulong vtype) void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *pflags); +void riscv_cpu_update_mask(CPURISCVState *env); + RISCVException riscv_csrrw(CPURISCVState *env, int csrno, target_ulong *ret_value, target_ulong new_value, target_ulong write_mask); |