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authorLIU Zhiwei <zhiwei_liu@c-sky.com>2021-12-10 15:55:49 +0800
committerAlistair Francis <alistair.francis@wdc.com>2021-12-20 14:51:36 +1000
commit61b4b69d122c055fbf6310e629f3f2d1e70c2599 (patch)
tree584be60c06f2456326547d4d0f266b62e57552f7 /target/riscv/cpu.h
parent52561f2a808a16bde80c9a165f54e07df2e527a7 (diff)
target/riscv: rvv-1.0: add mstatus VS field
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20211210075704.23951-4-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu.h')
-rw-r--r--target/riscv/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 5ea2004ae0..48b8f61210 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -352,6 +352,7 @@ int riscv_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
int riscv_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int riscv_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
bool riscv_cpu_fp_enabled(CPURISCVState *env);
+bool riscv_cpu_vector_enabled(CPURISCVState *env);
bool riscv_cpu_virt_enabled(CPURISCVState *env);
void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable);
bool riscv_cpu_two_stage_lookup(int mmu_idx);
@@ -395,6 +396,7 @@ void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);
#define TB_FLAGS_PRIV_MMU_MASK 3
#define TB_FLAGS_PRIV_HYP_ACCESS_MASK (1 << 2)
#define TB_FLAGS_MSTATUS_FS MSTATUS_FS
+#define TB_FLAGS_MSTATUS_VS MSTATUS_VS
typedef CPURISCVState CPUArchState;
typedef RISCVCPU ArchCPU;