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authorAnup Patel <anup.patel@wdc.com>2022-02-04 23:16:41 +0530
committerAlistair Francis <alistair.francis@wdc.com>2022-02-16 12:24:18 +1000
commitf87adf23fa66fd07d9f003173d386c0a54d9ddb0 (patch)
tree26b2a4c7a883a6583fb3f434aad388885691ffb0 /target/riscv/cpu.h
parent02d9565b92c97af6bac2ff1bb18967a5e95b9694 (diff)
target/riscv: Allow setting CPU feature from machine/device emulation
The machine or device emulation should be able to force set certain CPU features because: 1) We can have certain CPU features which are in-general optional but implemented by RISC-V CPUs on the machine. 2) We can have devices which require a certain CPU feature. For example, AIA IMSIC devices expect AIA CSRs implemented by RISC-V CPUs. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-id: 20220204174700.534953-6-anup@brainfault.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu.h')
-rw-r--r--target/riscv/cpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index f030cb58b2..283a3cda4b 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -379,6 +379,11 @@ static inline bool riscv_feature(CPURISCVState *env, int feature)
return env->features & (1ULL << feature);
}
+static inline void riscv_set_feature(CPURISCVState *env, int feature)
+{
+ env->features |= (1ULL << feature);
+}
+
#include "cpu_user.h"
extern const char * const riscv_int_regnames[];