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authorAlistair Francis <alistair.francis@wdc.com>2020-05-28 11:04:15 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-06-03 09:11:51 -0700
commitff832b77aa8ab454e092fb73b61821e56218e8a5 (patch)
tree129f01c7196fcb069ad36945ee479ca70e489bf4 /target/riscv/cpu.c
parent8be6971b73da45e8ee9f8decd136ff054b5230ac (diff)
target/riscv: Don't set PMP feature in the cpu init
The PMP is enabled by default via the "pmp" property so there is no need for us to set it in the init function. As all CPUs have PMP support just remove the set_feature() call in the CPU init functions. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
Diffstat (limited to 'target/riscv/cpu.c')
-rw-r--r--target/riscv/cpu.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index e1c9a2de58..54829217dc 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -142,7 +142,6 @@ static void rv32gcsu_priv1_10_0_cpu_init(Object *obj)
set_misa(env, RV32 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
set_priv_version(env, PRIV_VERSION_1_10_0);
set_resetvec(env, DEFAULT_RSTVEC);
- set_feature(env, RISCV_FEATURE_PMP);
}
static void rv32imacu_nommu_cpu_init(Object *obj)
@@ -151,7 +150,6 @@ static void rv32imacu_nommu_cpu_init(Object *obj)
set_misa(env, RV32 | RVI | RVM | RVA | RVC | RVU);
set_priv_version(env, PRIV_VERSION_1_10_0);
set_resetvec(env, DEFAULT_RSTVEC);
- set_feature(env, RISCV_FEATURE_PMP);
qdev_prop_set_bit(DEVICE(obj), "mmu", false);
}
@@ -161,7 +159,6 @@ static void rv32imafcu_nommu_cpu_init(Object *obj)
set_misa(env, RV32 | RVI | RVM | RVA | RVF | RVC | RVU);
set_priv_version(env, PRIV_VERSION_1_10_0);
set_resetvec(env, DEFAULT_RSTVEC);
- set_feature(env, RISCV_FEATURE_PMP);
qdev_prop_set_bit(DEVICE(obj), "mmu", false);
}
@@ -181,7 +178,6 @@ static void rv64gcsu_priv1_10_0_cpu_init(Object *obj)
set_misa(env, RV64 | RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU);
set_priv_version(env, PRIV_VERSION_1_10_0);
set_resetvec(env, DEFAULT_RSTVEC);
- set_feature(env, RISCV_FEATURE_PMP);
}
static void rv64imacu_nommu_cpu_init(Object *obj)
@@ -190,7 +186,6 @@ static void rv64imacu_nommu_cpu_init(Object *obj)
set_misa(env, RV64 | RVI | RVM | RVA | RVC | RVU);
set_priv_version(env, PRIV_VERSION_1_10_0);
set_resetvec(env, DEFAULT_RSTVEC);
- set_feature(env, RISCV_FEATURE_PMP);
qdev_prop_set_bit(DEVICE(obj), "mmu", false);
}