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authorVíctor Colombo <victor.colombo@eldorado.org.br>2022-05-04 18:05:26 -0300
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-05-05 15:36:17 -0300
commit0939b8f8df43ad163a602d36f989dc9fd6e378f4 (patch)
tree014307565036619d6aff68041fda0a152270f1a6 /target/ppc
parent3868540f05c5e678d9cd889700dbcd66330c43cc (diff)
target/ppc: Remove msr_ee macro
msr_ee macro hides the usage of env->msr, which is a bad behavior Substitute it with FIELD_EX64 calls that explicitly use env->msr as a parameter. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220504210541.115256-8-victor.colombo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc')
-rw-r--r--target/ppc/cpu.h2
-rw-r--r--target/ppc/cpu_init.c15
-rw-r--r--target/ppc/excp_helper.c2
-rw-r--r--target/ppc/kvm.c3
4 files changed, 14 insertions, 8 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 0d5a850794..06667c2c60 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -355,6 +355,7 @@ typedef enum {
#define MSR_LE 0 /* Little-endian mode 1 hflags */
FIELD(MSR, ILE, MSR_ILE, 1)
+FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
@@ -478,7 +479,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_gs ((env->msr >> MSR_GS) & 1)
#define msr_pow ((env->msr >> MSR_POW) & 1)
#define msr_ce ((env->msr >> MSR_CE) & 1)
-#define msr_ee ((env->msr >> MSR_EE) & 1)
#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_me ((env->msr >> MSR_ME) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 0c6b83406e..10e7c41bc9 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -5949,7 +5949,8 @@ static bool cpu_has_work_POWER7(CPUState *cs)
}
return false;
} else {
- return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+ return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
}
@@ -6120,7 +6121,8 @@ static bool cpu_has_work_POWER8(CPUState *cs)
}
return false;
} else {
- return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+ return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
}
@@ -6337,7 +6339,8 @@ static bool cpu_has_work_POWER9(CPUState *cs)
}
return false;
} else {
- return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+ return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
}
@@ -6551,7 +6554,8 @@ static bool cpu_has_work_POWER10(CPUState *cs)
}
return false;
} else {
- return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+ return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
}
@@ -7119,7 +7123,8 @@ static bool ppc_cpu_has_work(CPUState *cs)
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
- return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+ return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
static void ppc_cpu_reset(DeviceState *dev)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 7e8e34ef06..4c206ba209 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1709,7 +1709,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)
* clear when coming out of some power management states (in order
* for them to become a 0x100).
*/
- async_deliver = (msr_ee != 0) || env->resume_as_sreset;
+ async_deliver = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
/* Hypervisor decrementer exception */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) {
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 7a777a4d0c..db3a92869c 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -1352,7 +1352,8 @@ static int kvmppc_handle_halt(PowerPCCPU *cpu)
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
- if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
+ if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) &&
+ FIELD_EX64(env->msr, MSR, EE)) {
cs->halted = 1;
cs->exception_index = EXCP_HLT;
}