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authorRichard Henderson <richard.henderson@linaro.org>2021-05-18 15:11:34 -0500
committerDavid Gibson <david@gibson.dropbear.id.au>2021-05-19 12:52:07 +1000
commit05c3ef145121f0cb1f7b06884025a47ce1136cee (patch)
tree83be7f8e7f70e21e63b29ed87ae99e0b7c6ab7af /target/ppc
parent61d2cde86737ec1a38f076bbc2a59f2c717e1afd (diff)
target/ppc: Remove type argument from mmubooke_check_tlb
We can now use MMU_INST_FETCH from access_type for this. Unify the I/D code paths, making use of prot_for_access_type. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-13-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc')
-rw-r--r--target/ppc/mmu_helper.c44
1 files changed, 13 insertions, 31 deletions
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 1426973b4d..4e5cc11b44 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -738,9 +738,9 @@ void store_40x_sler(CPUPPCState *env, uint32_t val)
static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb,
hwaddr *raddr, int *prot, target_ulong address,
- MMUAccessType access_type, int type, int i)
+ MMUAccessType access_type, int i)
{
- int ret, prot2;
+ int prot2;
if (ppcemb_tlb_check(env, tlb, raddr, address,
env->spr[SPR_BOOKE_PID],
@@ -772,37 +772,19 @@ found_tlb:
}
/* Check the address space */
- if (type == ACCESS_CODE) {
- if (msr_ir != (tlb->attr & 1)) {
- LOG_SWTLB("%s: AS doesn't match\n", __func__);
- return -1;
- }
-
- *prot = prot2;
- if (prot2 & PAGE_EXEC) {
- LOG_SWTLB("%s: good TLB!\n", __func__);
- return 0;
- }
-
- LOG_SWTLB("%s: no PAGE_EXEC: %x\n", __func__, prot2);
- ret = -3;
- } else {
- if (msr_dr != (tlb->attr & 1)) {
- LOG_SWTLB("%s: AS doesn't match\n", __func__);
- return -1;
- }
-
- *prot = prot2;
- if (prot2 & (access_type == MMU_DATA_LOAD ? PAGE_READ : PAGE_WRITE)) {
- LOG_SWTLB("%s: found TLB!\n", __func__);
- return 0;
- }
+ if ((access_type == MMU_INST_FETCH ? msr_ir : msr_dr) != (tlb->attr & 1)) {
+ LOG_SWTLB("%s: AS doesn't match\n", __func__);
+ return -1;
+ }
- LOG_SWTLB("%s: PAGE_READ/WRITE doesn't match: %x\n", __func__, prot2);
- ret = -2;
+ *prot = prot2;
+ if (prot2 & prot_for_access_type(access_type)) {
+ LOG_SWTLB("%s: good TLB!\n", __func__);
+ return 0;
}
- return ret;
+ LOG_SWTLB("%s: no prot match: %x\n", __func__, prot2);
+ return access_type == MMU_INST_FETCH ? -3 : -2;
}
static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
@@ -819,7 +801,7 @@ static int mmubooke_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
for (i = 0; i < env->nb_tlb; i++) {
tlb = &env->tlb.tlbe[i];
ret = mmubooke_check_tlb(env, tlb, &raddr, &ctx->prot, address,
- access_type, type, i);
+ access_type, i);
if (ret != -1) {
break;
}