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authorRichard Henderson <richard.henderson@linaro.org>2021-12-17 17:57:16 +0100
committerCédric Le Goater <clg@kaod.org>2021-12-17 17:57:16 +0100
commitdedbfda765a74c3965c5dd676e64fc3afa15e963 (patch)
tree067d5807855f853be8ce2c4a3ba4bd34122e1d26 /target/ppc
parent7f87214e3b9f0d562d75f9c7315bfa53b00d29a6 (diff)
target/ppc: Add helper for frsqrtes
There is no double-rounding bug here, because the result is merely an estimate to within 1 part in 32, but perform the operation with float64r32_div for consistency. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211119160502.17432-33-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc')
-rw-r--r--target/ppc/fpu_helper.c19
-rw-r--r--target/ppc/helper.h1
-rw-r--r--target/ppc/translate/fp-impl.c.inc3
3 files changed, 21 insertions, 2 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 4acc557c08..83c8f2556c 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -896,6 +896,25 @@ float64 helper_frsqrte(CPUPPCState *env, float64 arg)
return retd;
}
+/* frsqrtes - frsqrtes. */
+float64 helper_frsqrtes(CPUPPCState *env, float64 arg)
+{
+ /* "Estimate" the reciprocal with actual division. */
+ float64 rets = float64_sqrt(arg, &env->fp_status);
+ float64 retd = float64r32_div(float64_one, rets, &env->fp_status);
+ int flags = get_float_exception_flags(&env->fp_status);
+
+ if (unlikely(flags & float_flag_invalid)) {
+ float_invalid_op_sqrt(env, flags, 1, GETPC());
+ }
+ if (unlikely(flags & float_flag_divbyzero)) {
+ /* Reciprocal of (square root of) zero. */
+ float_zero_divide_excp(env, GETPC());
+ }
+
+ return retd;
+}
+
/* fsel - fsel. */
uint64_t helper_fsel(CPUPPCState *env, uint64_t arg1, uint64_t arg2,
uint64_t arg3)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index f70a3aefcb..48774fab19 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -114,6 +114,7 @@ DEF_HELPER_2(fsqrts, f64, env, f64)
DEF_HELPER_2(fre, i64, env, i64)
DEF_HELPER_2(fres, i64, env, i64)
DEF_HELPER_2(frsqrte, i64, env, i64)
+DEF_HELPER_2(frsqrtes, i64, env, i64)
DEF_HELPER_4(fsel, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_2(ftdiv, TCG_CALL_NO_RWG_SE, i32, i64, i64)
diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc
index bf56e35cb6..2baae5988f 100644
--- a/target/ppc/translate/fp-impl.c.inc
+++ b/target/ppc/translate/fp-impl.c.inc
@@ -212,8 +212,7 @@ static void gen_frsqrtes(DisasContext *ctx)
t1 = tcg_temp_new_i64();
gen_reset_fpstatus();
get_fpr(t0, rB(ctx->opcode));
- gen_helper_frsqrte(t1, cpu_env, t0);
- gen_helper_frsp(t1, cpu_env, t1);
+ gen_helper_frsqrtes(t1, cpu_env, t0);
set_fpr(rD(ctx->opcode), t1);
gen_compute_fprf_float64(t1);
if (unlikely(Rc(ctx->opcode) != 0)) {