diff options
author | KONRAD Frederic <frederic.konrad@adacore.com> | 2017-08-07 17:50:46 +0200 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2017-09-08 09:30:55 +1000 |
commit | c449d8ba42f5c374e9fa0d1b08766c9a0d040ad2 (patch) | |
tree | 127a60fa5dcc705e6c09b38f4bd5eaefdd72c19f /target/ppc | |
parent | 3f330293bace409fc172201f27084784c697f8f8 (diff) |
booke206: fix tlbnps for fixed size TLB
Some OS don't populate the TSIZE field when using a fixed size TLB which result
in a 1KB TLB. When the TLB is a fixed size TLB the TSIZE field should be
ignored.
Fix this wrong behavior with MAV 2.0.
Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc')
-rw-r--r-- | target/ppc/cpu.h | 22 | ||||
-rw-r--r-- | target/ppc/mmu_helper.c | 16 |
2 files changed, 32 insertions, 6 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 21f0ddd056..042372c5ad 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2491,6 +2491,28 @@ static inline uint32_t booke206_tlbnps(CPUPPCState *env, const int tlbn) return ret; } +static inline void booke206_fixed_size_tlbn(CPUPPCState *env, const int tlbn, + ppcmas_tlb_t *tlb) +{ + uint8_t i; + int32_t tsize = -1; + + for (i = 0; i < 32; i++) { + if ((env->spr[SPR_BOOKE_TLB0PS + tlbn]) & (1ULL << i)) { + if (tsize == -1) { + tsize = i; + } else { + return; + } + } + } + + /* TLBnPS unimplemented? Odd.. */ + assert(tsize != -1); + tlb->mas1 &= ~MAS1_TSIZE_MASK; + tlb->mas1 |= ((uint32_t)tsize) << MAS1_TSIZE_SHIFT; +} + #endif static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index f06b9382b4..2a1f9902c9 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -2632,12 +2632,16 @@ void helper_booke206_tlbwe(CPUPPCState *env) env->spr[SPR_BOOKE_MAS3]; tlb->mas1 = env->spr[SPR_BOOKE_MAS1]; - /* MAV 1.0 only */ - if (!(tlbncfg & TLBnCFG_AVAIL)) { - /* force !AVAIL TLB entries to correct page size */ - tlb->mas1 &= ~MAS1_TSIZE_MASK; - /* XXX can be configured in MMUCSR0 */ - tlb->mas1 |= (tlbncfg & TLBnCFG_MINSIZE) >> 12; + if ((env->spr[SPR_MMUCFG] & MMUCFG_MAVN) == MMUCFG_MAVN_V2) { + /* For TLB which has a fixed size TSIZE is ignored with MAV2 */ + booke206_fixed_size_tlbn(env, tlbn, tlb); + } else { + if (!(tlbncfg & TLBnCFG_AVAIL)) { + /* force !AVAIL TLB entries to correct page size */ + tlb->mas1 &= ~MAS1_TSIZE_MASK; + /* XXX can be configured in MMUCSR0 */ + tlb->mas1 |= (tlbncfg & TLBnCFG_MINSIZE) >> 12; + } } /* Make a mask from TLB size to discard invalid bits in EPN field */ |