diff options
| author | Suraj Jitindar Singh <sjitindarsingh@gmail.com> | 2017-05-02 16:37:15 +1000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-05-11 09:45:15 +1000 |
| commit | c6fd28fd573d69938e4da6ab3348b0695cad4f42 (patch) | |
| tree | 11d76dc41153289381b6ef53a4699711a4a47cc9 /target/ppc | |
| parent | 6de833070ca25874541f633e5d3ecad3fa6db2e1 (diff) | |
target/ppc: Update tlbie to check privilege level based on GTSE
The Guest Translation Shootdown Enable (GTSE) bit in the Logical Partition
Control Register (LPCR) can be set to enable a guest to use the tlbie
instruction directly to invalidate translations.
When the GTSE bit is set then the tlbie instruction is supervisor
privileged, otherwise it is hypervisor privileged.
Add a guest translation shootdown enable (gtse) field to the diassembly
context and use this to check the correct privilege level at code
generation time.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/translate.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 4a1f24a54f..1ce6ab19f8 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -218,6 +218,7 @@ struct DisasContext { bool vsx_enabled; bool spe_enabled; bool tm_enabled; + bool gtse; ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */ int singlestep_enabled; uint64_t insns_flags; @@ -4538,7 +4539,12 @@ static void gen_tlbie(DisasContext *ctx) GEN_PRIV; #else TCGv_i32 t1; - CHK_HV; + + if (ctx->gtse) { + CHK_SV; /* If gtse is set then tblie is supervisor privileged */ + } else { + CHK_HV; /* Else hypervisor privileged */ + } if (NARROW_MODE(ctx)) { TCGv t0 = tcg_temp_new(); @@ -7252,6 +7258,7 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb) ctx.tm_enabled = false; } #endif + ctx.gtse = !!(env->spr[SPR_LPCR] & LPCR_GTSE); if ((env->flags & POWERPC_FLAG_SE) && msr_se) ctx.singlestep_enabled = CPU_SINGLE_STEP; else |