aboutsummaryrefslogtreecommitdiff
path: root/target/ppc
diff options
context:
space:
mode:
authorSuraj Jitindar Singh <sjitindarsingh@gmail.com>2017-02-10 16:25:52 +1100
committerDavid Gibson <david@gibson.dropbear.id.au>2017-02-22 11:28:28 +1100
commit7659ca1a3e22aa298022b1ecb21bf3650a01e814 (patch)
treed40f772f16fa9700f6e024a9caf6a7b8595738ce /target/ppc
parente0aee726bf166b36ddcbd31511bd96d7fa136ae0 (diff)
target/ppc: Fix LPCR DPFD mask define
The DPFD field in the LPCR is 3 bits wide. This has always been defined as 0x3 << shift which indicates a 2 bit field, which is incorrect. Correct this. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc')
-rw-r--r--target/ppc/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index bc2a2ce431..bb96dd5182 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -381,7 +381,7 @@ struct ppc_slb_t {
#define LPCR_ISL (1ull << (63 - 2))
#define LPCR_KBV (1ull << (63 - 3))
#define LPCR_DPFD_SHIFT (63 - 11)
-#define LPCR_DPFD (0x3ull << LPCR_DPFD_SHIFT)
+#define LPCR_DPFD (0x7ull << LPCR_DPFD_SHIFT)
#define LPCR_VRMASD_SHIFT (63 - 16)
#define LPCR_VRMASD (0x1full << LPCR_VRMASD_SHIFT)
#define LPCR_RMLS_SHIFT (63 - 37)