diff options
| author | Suraj Jitindar Singh <sjitindarsingh@gmail.com> | 2019-11-28 14:46:54 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-12-17 10:39:48 +1100 |
| commit | 5d62725b2fefd59abf7225d620f7092fd34b8e11 (patch) | |
| tree | ea19cd6b909fdbadccafe83f993120d096668aed /target/ppc/translate_init.inc.c | |
| parent | 2661f6ab2ba1694d7c19efdd622378817cb874ea (diff) | |
target/ppc: Implement the VTB for HV access
The virtual timebase register (VTB) is a 64-bit register which
increments at the same rate as the timebase register, present on POWER8
and later processors.
The register is able to be read/written by the hypervisor and read by
the supervisor. All other accesses are illegal.
Currently the VTB is just an alias for the timebase (TB) register.
Implement the VTB so that is can be read/written independent of the TB.
Make use of the existing method for accessing timebase facilities where
by the compensation is stored and used to compute the value on reads/is
updated on writes.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
[ clg: rebased on current ppc tree ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20191128134700.16091-2-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate_init.inc.c')
| -rw-r--r-- | target/ppc/translate_init.inc.c | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 7364d36b07..226aecf8f4 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -312,6 +312,16 @@ static void spr_write_hdecr(DisasContext *ctx, int sprn, int gprn) } } +static void spr_read_vtb(DisasContext *ctx, int gprn, int sprn) +{ + gen_helper_load_vtb(cpu_gpr[gprn], cpu_env); +} + +static void spr_write_vtb(DisasContext *ctx, int sprn, int gprn) +{ + gen_helper_store_vtb(cpu_env, cpu_gpr[gprn]); +} + #endif #endif @@ -8174,10 +8184,11 @@ static void gen_spr_power8_ebb(CPUPPCState *env) /* Virtual Time Base */ static void gen_spr_vtb(CPUPPCState *env) { - spr_register_kvm(env, SPR_VTB, "VTB", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_tbl, SPR_NOACCESS, - KVM_REG_PPC_VTB, 0x00000000); + spr_register_kvm_hv(env, SPR_VTB, "VTB", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_vtb, SPR_NOACCESS, + &spr_read_vtb, &spr_write_vtb, + KVM_REG_PPC_VTB, 0x00000000); } static void gen_spr_power8_fscr(CPUPPCState *env) |