diff options
| author | Suraj Jitindar Singh <sjitindarsingh@gmail.com> | 2017-02-10 16:25:51 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-02-22 11:28:28 +1100 |
| commit | 86cf1e9fe852e5c322968c2c708a7efa8b7be5d9 (patch) | |
| tree | a822ee586b21bab11008149a31eca4871f774375 /target/ppc/translate_init.c | |
| parent | 7659ca1a3e22aa298022b1ecb21bf3650a01e814 (diff) | |
target/ppc/POWER9: Add ISAv3.00 MMU definition
POWER9 processors implement the mmu as defined in version 3.00 of the ISA.
Add a definition for this mmu model and set the POWER9 cpu model to use
this mmu model.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate_init.c')
| -rw-r--r-- | target/ppc/translate_init.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 76f79fa77b..84bf1256b5 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8816,8 +8816,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) (1ull << MSR_PMM) | (1ull << MSR_RI) | (1ull << MSR_LE); - /* Using 2.07 defines until new radix model is added. */ - pcc->mmu_model = POWERPC_MMU_2_07; + pcc->mmu_model = POWERPC_MMU_3_00; #if defined(CONFIG_SOFTMMU) pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; /* segment page size remain the same */ |