diff options
| author | Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> | 2016-11-23 17:07:11 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-01-31 10:10:12 +1100 |
| commit | efa7319619e92809c12b5f12f7f5bcdb044e7e21 (patch) | |
| tree | 963e8f532012fb5c02cafcc4b40035f6fb510b5d /target/ppc/translate.c | |
| parent | 985e3023f7a041b35ee9590e393e3e5f7f224414 (diff) | |
target-ppc: rename CRF_* defines as CRF_*_BIT
Add _BIT to CRF_[GT,LT,EQ_SO] and introduce CRF_[GT,LT,EQ,SO] for usage
without shifts in the code. This would simplify the code.
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate.c')
| -rw-r--r-- | target/ppc/translate.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 8c99ea3e8c..e55a5dc532 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -612,17 +612,17 @@ static inline void gen_op_cmp(TCGv arg0, TCGv arg1, int s, int crf) tcg_gen_setcond_tl((s ? TCG_COND_LT: TCG_COND_LTU), t0, arg0, arg1); tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_LT); + tcg_gen_shli_i32(t1, t1, CRF_LT_BIT); tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); tcg_gen_setcond_tl((s ? TCG_COND_GT: TCG_COND_GTU), t0, arg0, arg1); tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_GT); + tcg_gen_shli_i32(t1, t1, CRF_GT_BIT); tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); tcg_gen_setcond_tl(TCG_COND_EQ, t0, arg0, arg1); tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_EQ); + tcg_gen_shli_i32(t1, t1, CRF_EQ_BIT); tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); tcg_temp_free(t0); @@ -748,7 +748,7 @@ static void gen_cmprb(DisasContext *ctx) tcg_gen_and_i32(src2lo, src2lo, src2hi); tcg_gen_or_i32(crf, crf, src2lo); } - tcg_gen_shli_i32(crf, crf, CRF_GT); + tcg_gen_shli_i32(crf, crf, CRF_GT_BIT); tcg_temp_free_i32(src1); tcg_temp_free_i32(src2); tcg_temp_free_i32(src2lo); @@ -2997,7 +2997,7 @@ static void gen_conditional_store(DisasContext *ctx, TCGv EA, tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); l1 = gen_new_label(); tcg_gen_brcond_tl(TCG_COND_NE, EA, cpu_reserve, l1); - tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 1 << CRF_EQ); + tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], CRF_EQ); tcg_gen_qemu_st_tl(cpu_gpr[reg], EA, ctx->mem_idx, memop); gen_set_label(l1); tcg_gen_movi_tl(cpu_reserve, -1); @@ -3091,7 +3091,7 @@ static void gen_stqcx_(DisasContext *ctx) tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); l1 = gen_new_label(); tcg_gen_brcond_tl(TCG_COND_NE, EA, cpu_reserve, l1); - tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 1 << CRF_EQ); + tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], CRF_EQ); if (unlikely(ctx->le_mode)) { gpr1 = cpu_gpr[reg + 1]; @@ -4272,7 +4272,7 @@ static void gen_slbfee_(DisasContext *ctx) l2 = gen_new_label(); tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rS(ctx->opcode)], -1, l1); - tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 1 << CRF_EQ); + tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], CRF_EQ); tcg_gen_br(l2); gen_set_label(l1); tcg_gen_movi_tl(cpu_gpr[rS(ctx->opcode)], 0); |