diff options
| author | David Gibson <david@gibson.dropbear.id.au> | 2020-01-06 17:18:54 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2020-03-17 09:41:15 +1100 |
| commit | d37b40daf647aaf2f5e4c4dfcd62c9412ff05009 (patch) | |
| tree | d15c09b395889b149e6e58db311ead0b8c86be0e /target/ppc/mmu-hash64.c | |
| parent | a864a6b382d52579210b86cde50bc949d48a3155 (diff) | |
target/ppc: Correct RMLS table
The table of RMA limits based on the LPCR[RMLS] field is slightly wrong.
We're missing the RMLS == 0 => 256 GiB RMA option, which is available on
POWER8, so add that.
The comment that goes with the table is much more wrong. We *don't* filter
invalid RMLS values when writing the LPCR, and there's not really a
sensible way to do so. Furthermore, while in theory the set of RMLS values
is implementation dependent, it seems in practice the same set has been
available since around POWER4+ up until POWER8, the last model which
supports RMLS at all. So, correct that as well.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'target/ppc/mmu-hash64.c')
| -rw-r--r-- | target/ppc/mmu-hash64.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 934989e6d9..fcccaabb88 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -762,15 +762,16 @@ static target_ulong rmls_limit(PowerPCCPU *cpu) { CPUPPCState *env = &cpu->env; /* - * This is the full 4 bits encoding of POWER8. Previous - * CPUs only support a subset of these but the filtering - * is done when writing LPCR. + * In theory the meanings of RMLS values are implementation + * dependent. In practice, this seems to have been the set from + * POWER4+..POWER8, and RMLS is no longer supported in POWER9. * * Unsupported values mean the OS has shot itself in the * foot. Return a 0-sized RMA in this case, which we expect * to trigger an immediate DSI or ISI */ static const target_ulong rma_sizes[16] = { + [0] = 256 * GiB, [1] = 16 * GiB, [2] = 1 * GiB, [3] = 64 * MiB, |