diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-03-23 12:43:36 -0600 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-05-04 11:41:24 +1000 |
| commit | f03de3b44b1053c3c82f41a22ae452d1ecfdd8c5 (patch) | |
| tree | ca441df0a8df28109c38b5d90e38fcefc3917348 /target/ppc/mmu-hash64.c | |
| parent | f43520e5b233828bd4d98b4a1300ddb475e7486a (diff) | |
target/ppc: Put LPCR[GTSE] in hflags
Because this bit was not in hflags, the privilege check
for tlb instructions was essentially random.
Recompute hflags when storing to LPCR.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323184340.619757-7-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/mmu-hash64.c')
| -rw-r--r-- | target/ppc/mmu-hash64.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 0fabc10302..d517a99832 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -30,6 +30,7 @@ #include "exec/log.h" #include "hw/hw.h" #include "mmu-book3s-v3.h" +#include "helper_regs.h" /* #define DEBUG_SLB */ @@ -1125,6 +1126,8 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) CPUPPCState *env = &cpu->env; env->spr[SPR_LPCR] = val & pcc->lpcr_mask; + /* The gtse bit affects hflags */ + hreg_compute_hflags(env); } void helper_store_lpcr(CPUPPCState *env, target_ulong val) |