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| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2019-06-16 13:37:43 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-07-02 09:43:58 +1000 |
| commit | 75cf84cbeeae9f33e6800ac78d41c3c6286fac06 (patch) | |
| tree | 07d83fac4c0dff698d4798f8811e8558e17ac7ac /target/ppc/mmu-book3s-v3.h | |
| parent | e0d6a362be2172177f34eb0d9c8cb5118ee6607d (diff) | |
target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c
Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_X2 macro which performs the decode based
upon xT and xB at translation time.
With the previous change to the xscvqpdp generator and helper functions the
opcode parameter is no longer required in the common case and can be
removed.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190616123751.781-8-mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/mmu-book3s-v3.h')
0 files changed, 0 insertions, 0 deletions