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authorRichard Henderson <richard.henderson@linaro.org>2021-03-23 12:43:38 -0600
committerDavid Gibson <david@gibson.dropbear.id.au>2021-05-04 11:41:25 +1000
commitd764184ddb22a7a41a293e54c26cfe1717167a3f (patch)
treedd31419ceb1145465b00924d4648ee23c59b2bc2 /target/ppc/mem_helper.c
parent0e6bac3edb42b284aad329313e3a65c451af1d52 (diff)
target/ppc: Remove env->immu_idx and env->dmmu_idx
We weren't recording MSR_GS in hflags, which means that BookE memory accesses were essentially random vs Guest State. Instead of adding this bit directly, record the completed mmu indexes instead. This makes it obvious that we are recording exactly the information that we need. This also means that we can stop directly recording MSR_IR. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210323184340.619757-9-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/mem_helper.c')
-rw-r--r--target/ppc/mem_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index f4f7e730de..444b2a30ef 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -278,7 +278,7 @@ static void dcbz_common(CPUPPCState *env, target_ulong addr,
target_ulong mask, dcbz_size = env->dcache_line_size;
uint32_t i;
void *haddr;
- int mmu_idx = epid ? PPC_TLB_EPID_STORE : env->dmmu_idx;
+ int mmu_idx = epid ? PPC_TLB_EPID_STORE : cpu_mmu_index(env, false);
#if defined(TARGET_PPC64)
/* Check for dcbz vs dcbzl on 970 */