diff options
| author | Nicholas Piggin <npiggin@gmail.com> | 2022-05-19 23:59:08 +1000 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-05-26 17:11:33 -0300 |
| commit | 03abfd90cfb02aa08f44bbb7141b0aaaf69042ef (patch) | |
| tree | f44f2f70b6db7a1eab45a8ed086c6f5150b36745 /target/ppc/machine.c | |
| parent | fc879703f74851e3e861894a0c4a6902877d0c2c (diff) | |
target/ppc: Implement lwsync with weaker memory ordering
This allows an x86 host to no-op lwsyncs, and ppc host can use lwsync
rather than sync.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220519135908.21282-5-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/machine.c')
| -rw-r--r-- | target/ppc/machine.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/ppc/machine.c b/target/ppc/machine.c index 7104a5c67e..a7d9036c09 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -157,7 +157,8 @@ static int cpu_pre_save(void *opaque) | PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 - | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | PPC2_TM; + | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | PPC2_TM + | PPC2_MEM_LWSYNC; env->spr[SPR_LR] = env->lr; env->spr[SPR_CTR] = env->ctr; |