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authorLuis Pires <luis.pires@eldorado.org.br>2021-10-29 16:24:06 -0300
committerDavid Gibson <david@gibson.dropbear.id.au>2021-11-09 10:32:52 +1100
commitd39b2cc7d0b87d95bbecbd142179efdc0b85c4e5 (patch)
tree03acb1af4615971c0230ac9b9aa9bb41e0aecb94 /target/ppc/insn32.decode
parent86057426d037ca023632156777a28d8493eaeb9d (diff)
target/ppc: Implement DCFFIXQQ
Implement the following PowerISA v3.1 instruction: dcffixqq: DFP Convert From Fixed Quadword Quad Signed-off-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211029192417.400707-5-luis.pires@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/insn32.decode')
-rw-r--r--target/ppc/insn32.decode8
1 files changed, 8 insertions, 0 deletions
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index e13f920702..36586dfa59 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -50,6 +50,10 @@
&X_bfl bf l:bool ra rb
@X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl
+&X_frtp_vrb frtp vrb
+%x_frtp 22:4 !function=times_2
+@X_frtp_vrb ...... ....0 ..... vrb:5 .......... . &X_frtp_vrb frtp=%x_frtp
+
### Fixed-Point Load Instructions
LBZ 100010 ..... ..... ................ @D
@@ -160,6 +164,10 @@ SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi
SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi
SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi
+### Decimal Floating-Point Conversion Instructions
+
+DCFFIXQQ 111111 ..... 00000 ..... 1111100010 - @X_frtp_vrb
+
## Vector Bit Manipulation Instruction
VCFUGED 000100 ..... ..... ..... 10101001101 @VX