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authorGreg Kurz <groug@kaod.org>2019-03-22 19:03:51 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2019-03-29 10:22:22 +1100
commitd0db7caddb1939e103a7bc6bbf09b3cd58dcf092 (patch)
tree8c334c87d5c17fb6cf2d5dbfb022df6ede6bc2ff /target/ppc/helper_regs.h
parentfa200c95f7f99ce14b8af25ea0be478c722d3cec (diff)
target/ppc: Consolidate 64-bit server processor detection in a helper
We use PPC_SEGMENT_64B in various places to guard code that is specific to 64-bit server processors compliant with arch 2.x. Consolidate the logic in a helper macro with an explicit name. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155327783157.1283071.3747129891004927299.stgit@bahia.lan> Tested-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/helper_regs.h')
-rw-r--r--target/ppc/helper_regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h
index a2205e1044..c863abc0bf 100644
--- a/target/ppc/helper_regs.h
+++ b/target/ppc/helper_regs.h
@@ -152,7 +152,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
* - 64-bit embedded implementations do not need any operation to be
* performed when PR is set.
*/
- if ((env->insns_flags & PPC_SEGMENT_64B) && ((value >> MSR_PR) & 1)) {
+ if (is_book3s_arch2x(env) && ((value >> MSR_PR) & 1)) {
value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR);
}
#endif