diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2021-03-15 12:46:00 -0600 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2021-05-04 11:41:24 +1000 |
commit | 1828504672cece95f7b38e9e63eb2dfeeb447830 (patch) | |
tree | 7bfccd70f10921577b1a8636754a514e763e545c /target/ppc/helper_regs.c | |
parent | 8a05fd9a22aa16d8a076a5dc9af2b5ed3658243c (diff) |
target/ppc: Move 601 hflags adjustment to hreg_compute_hflags
Keep all hflags computation in one place, as this will be
especially important later.
Introduce a new POWERPC_FLAG_HID0_LE bit to indicate when
LE should be taken from HID0. This appears to be set if
and only if POWERPC_FLAG_RTC_CLK is set, but we're not
short of bits and having both names will avoid confusion.
Note that this was the only user of hflags_nmsr, so we can
perform a straight assignment rather than mask and set.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210315184615.1985590-3-richard.henderson@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/helper_regs.c')
-rw-r--r-- | target/ppc/helper_regs.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 5e18232b84..95b9aca61f 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -96,8 +96,17 @@ void hreg_compute_hflags(CPUPPCState *env) hflags_mask |= (1ULL << MSR_CM) | (1ULL << MSR_SF) | MSR_HVB; hreg_compute_mem_idx(env); env->hflags = env->msr & hflags_mask; - /* Merge with hflags coming from other registers */ - env->hflags |= env->hflags_nmsr; + + if (env->flags & POWERPC_FLAG_HID0_LE) { + /* + * Note that MSR_LE is not set in env->msr_mask for this cpu, + * and so will never be set in msr or hflags at this point. + */ + uint32_t le = extract32(env->spr[SPR_HID0], 3, 1); + env->hflags |= le << MSR_LE; + /* Retain for backward compatibility with migration. */ + env->hflags_nmsr = le << MSR_LE; + } } void cpu_interrupt_exittb(CPUState *cs) |