aboutsummaryrefslogtreecommitdiff
path: root/target/ppc/gdbstub.c
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2021-08-27 11:34:12 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-08-27 11:34:12 +0100
commitad22d0583300df420819e6c89b1c022b998fac8a (patch)
tree8fefa43b128a77adaf153f054fc95cce35ae8228 /target/ppc/gdbstub.c
parent0289f62335b2af49f6c30296cc00d009995b35f6 (diff)
parent0ff16b6b78831240c39cfaaeab1f22ae52c84b09 (diff)
Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.2-20210827' into staging
ppc patch queue 2021-08-27 First ppc pull request for qemu-6.2. As usual, there's a fair bit here, since it's been queued during the 6.1 freeze. Highlights are: * Some fixes for 128 bit arithmetic and some vector opcodes that use them * Significant improvements to the powernv to support POWER10 cpus (more to come though) * Several cleanups to the ppc softmmu code * A few other assorted fixes # gpg: Signature made Fri 27 Aug 2021 08:09:12 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.2-20210827: target/ppc: fix vector registers access in gdbstub for little-endian include/qemu/int128.h: introduce bswap128s target/ppc: fix vextu[bhw][lr]x helpers include/qemu/int128.h: define struct Int128 according to the host endianness ppc/xive: Export xive_presenter_notify() ppc/xive: Export PQ get/set routines ppc/pnv: add a chip topology index for POWER10 ppc/pnv: Distribute RAM among the chips ppc/pnv: Use a simple incrementing index for the chip-id ppc/pnv: powerpc_excp: Do not discard HDECR exception when entering power-saving mode ppc/pnv: Change the POWER10 machine to support DD2 only ppc: Add a POWER10 DD2 CPU ppc/pnv: update skiboot to commit 820d43c0a775. target/ppc: moved store_40x_sler to helper_regs.c target/ppc: moved ppc_store_sdr1 to mmu_common.c target/ppc: divided mmu_helper.c in 2 files spapr_pci: Fix leak in spapr_phb_vfio_get_loc_code() with g_autofree xive: Remove extra '0x' prefix in trace events Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/ppc/gdbstub.c')
-rw-r--r--target/ppc/gdbstub.c32
1 files changed, 7 insertions, 25 deletions
diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c
index 09ff1328d4..1808a150e4 100644
--- a/target/ppc/gdbstub.c
+++ b/target/ppc/gdbstub.c
@@ -101,6 +101,8 @@ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len)
bswap32s((uint32_t *)mem_buf);
} else if (len == 8) {
bswap64s((uint64_t *)mem_buf);
+ } else if (len == 16) {
+ bswap128s((Int128 *)mem_buf);
} else {
g_assert_not_reached();
}
@@ -389,15 +391,6 @@ const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name)
}
#endif
-static bool avr_need_swap(CPUPPCState *env)
-{
-#ifdef HOST_WORDS_BIGENDIAN
- return msr_le;
-#else
- return !msr_le;
-#endif
-}
-
#if !defined(CONFIG_USER_ONLY)
static int gdb_find_spr_idx(CPUPPCState *env, int n)
{
@@ -486,14 +479,9 @@ static int gdb_get_avr_reg(CPUPPCState *env, GByteArray *buf, int n)
if (n < 32) {
ppc_avr_t *avr = cpu_avr_ptr(env, n);
- if (!avr_need_swap(env)) {
- gdb_get_reg128(buf, avr->u64[0] , avr->u64[1]);
- } else {
- gdb_get_reg128(buf, avr->u64[1] , avr->u64[0]);
- }
+ gdb_get_reg128(buf, avr->VsrD(0), avr->VsrD(1));
mem_buf = gdb_get_reg_ptr(buf, 16);
- ppc_maybe_bswap_register(env, mem_buf, 8);
- ppc_maybe_bswap_register(env, mem_buf + 8, 8);
+ ppc_maybe_bswap_register(env, mem_buf, 16);
return 16;
}
if (n == 32) {
@@ -515,15 +503,9 @@ static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
ppc_avr_t *avr = cpu_avr_ptr(env, n);
- ppc_maybe_bswap_register(env, mem_buf, 8);
- ppc_maybe_bswap_register(env, mem_buf + 8, 8);
- if (!avr_need_swap(env)) {
- avr->u64[0] = ldq_p(mem_buf);
- avr->u64[1] = ldq_p(mem_buf + 8);
- } else {
- avr->u64[1] = ldq_p(mem_buf);
- avr->u64[0] = ldq_p(mem_buf + 8);
- }
+ ppc_maybe_bswap_register(env, mem_buf, 16);
+ avr->VsrD(0) = ldq_p(mem_buf);
+ avr->VsrD(1) = ldq_p(mem_buf + 8);
return 16;
}
if (n == 32) {