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authorBharata B Rao <bharata@linux.vnet.ibm.com>2017-02-10 12:53:09 +0530
committerDavid Gibson <david@gibson.dropbear.id.au>2017-02-22 11:28:28 +1100
commite0aee726bf166b36ddcbd31511bd96d7fa136ae0 (patch)
treeb867b59348bf688cc61341b0857325ac9fc4198e /target/ppc/fpu_helper.c
parenta8d411abac9347aadeac87687b8a3c9895ea0fd7 (diff)
target-ppc: Add xscvqpudz and xscvqpuwz instructions
xscvqpudz: VSX Scalar truncate & Convert Quad-Precision format to Unsigned Doubleword format xscvqpuwz: VSX Scalar truncate & Convert Quad-Precision format to Unsigned Word format Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/fpu_helper.c')
-rw-r--r--target/ppc/fpu_helper.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 96f9801186..58aee640c3 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -3086,6 +3086,8 @@ VSX_CVT_FP_TO_INT_VECTOR(xscvqpsdz, float128, int64, f128, VsrD(0), \
VSX_CVT_FP_TO_INT_VECTOR(xscvqpswz, float128, int32, f128, VsrD(0), \
0xffffffff80000000ULL)
+VSX_CVT_FP_TO_INT_VECTOR(xscvqpudz, float128, uint64, f128, VsrD(0), 0x0ULL)
+VSX_CVT_FP_TO_INT_VECTOR(xscvqpuwz, float128, uint32, f128, VsrD(0), 0x0ULL)
/* VSX_CVT_INT_TO_FP - VSX integer to floating point conversion
* op - instruction mnemonic