diff options
| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2019-06-16 13:37:48 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-07-02 09:43:58 +1000 |
| commit | 6ae4a57ab037f921207d92568d18d1bd5f8b62de (patch) | |
| tree | 1407780206bb1dfe6b6863df7ee3c28c4b741156 /target/ppc/fpu_helper.c | |
| parent | 99229620112a29b24f0ca5b7e16a2548d7318337 (diff) | |
target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c
Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_R2_AB macro which performs the decode based
upon rA and rB at translation time.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190616123751.781-13-mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/fpu_helper.c')
| -rw-r--r-- | target/ppc/fpu_helper.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index cb593517ae..f0a897cb9a 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -2452,10 +2452,9 @@ void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode, do_float_check_status(env, GETPC()); } -void helper_xscmpexpqp(CPUPPCState *env, uint32_t opcode) +void helper_xscmpexpqp(CPUPPCState *env, uint32_t opcode, + ppc_vsr_t *xa, ppc_vsr_t *xb) { - ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; - ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; int64_t exp_a, exp_b; uint32_t cc; @@ -2531,10 +2530,9 @@ VSX_SCALAR_CMP(xscmpodp, 1) VSX_SCALAR_CMP(xscmpudp, 0) #define VSX_SCALAR_CMPQ(op, ordered) \ -void helper_##op(CPUPPCState *env, uint32_t opcode) \ +void helper_##op(CPUPPCState *env, uint32_t opcode, \ + ppc_vsr_t *xa, ppc_vsr_t *xb) \ { \ - ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; \ - ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; \ uint32_t cc = 0; \ bool vxsnan_flag = false, vxvc_flag = false; \ \ |