diff options
| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2019-06-16 13:37:46 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-07-02 09:43:58 +1000 |
| commit | 23d0766bd984c63bd600aaada1d7d534aed40f6d (patch) | |
| tree | fa146a832c1bcdeba83c547fc834c7d87846d974 /target/ppc/fpu_helper.c | |
| parent | 8d830485fc551b4ff6f609e4245cf49e63fdf9ff (diff) | |
target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c
Rather than perform the VSR register decoding within the helper itself,
introduce a new GEN_VSX_HELPER_R3 macro which performs the decode based
upon rD, rA and rB at translation time.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190616123751.781-11-mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/fpu_helper.c')
| -rw-r--r-- | target/ppc/fpu_helper.c | 36 |
1 files changed, 12 insertions, 24 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 5fb43b619e..44970ebec9 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -1842,11 +1842,9 @@ VSX_ADD_SUB(xssubsp, sub, 1, float64, VsrD(0), 1, 1) VSX_ADD_SUB(xvsubdp, sub, 2, float64, VsrD(i), 0, 0) VSX_ADD_SUB(xvsubsp, sub, 4, float32, VsrW(i), 0, 0) -void helper_xsaddqp(CPUPPCState *env, uint32_t opcode) +void helper_xsaddqp(CPUPPCState *env, uint32_t opcode, + ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) { - ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32]; - ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; - ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; ppc_vsr_t t = *xt; float_status tstat; @@ -1920,11 +1918,9 @@ VSX_MUL(xsmulsp, 1, float64, VsrD(0), 1, 1) VSX_MUL(xvmuldp, 2, float64, VsrD(i), 0, 0) VSX_MUL(xvmulsp, 4, float32, VsrW(i), 0, 0) -void helper_xsmulqp(CPUPPCState *env, uint32_t opcode) +void helper_xsmulqp(CPUPPCState *env, uint32_t opcode, + ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) { - ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32]; - ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; - ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; ppc_vsr_t t = *xt; float_status tstat; @@ -1999,11 +1995,9 @@ VSX_DIV(xsdivsp, 1, float64, VsrD(0), 1, 1) VSX_DIV(xvdivdp, 2, float64, VsrD(i), 0, 0) VSX_DIV(xvdivsp, 4, float32, VsrW(i), 0, 0) -void helper_xsdivqp(CPUPPCState *env, uint32_t opcode) +void helper_xsdivqp(CPUPPCState *env, uint32_t opcode, + ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) { - ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32]; - ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; - ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; ppc_vsr_t t = *xt; float_status tstat; @@ -2620,11 +2614,9 @@ VSX_MAX_MIN(xvmindp, minnum, 2, float64, VsrD(i)) VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i)) #define VSX_MAX_MINC(name, max) \ -void helper_##name(CPUPPCState *env, uint32_t opcode) \ +void helper_##name(CPUPPCState *env, uint32_t opcode, \ + ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) \ { \ - ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32]; \ - ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; \ - ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; \ ppc_vsr_t t = *xt; \ bool vxsnan_flag = false, vex_flag = false; \ \ @@ -2657,11 +2649,9 @@ VSX_MAX_MINC(xsmaxcdp, 1); VSX_MAX_MINC(xsmincdp, 0); #define VSX_MAX_MINJ(name, max) \ -void helper_##name(CPUPPCState *env, uint32_t opcode) \ +void helper_##name(CPUPPCState *env, uint32_t opcode, \ + ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) \ { \ - ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32]; \ - ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; \ - ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; \ ppc_vsr_t t = *xt; \ bool vxsnan_flag = false, vex_flag = false; \ \ @@ -3436,11 +3426,9 @@ void helper_xssqrtqp(CPUPPCState *env, uint32_t opcode) do_float_check_status(env, GETPC()); } -void helper_xssubqp(CPUPPCState *env, uint32_t opcode) +void helper_xssubqp(CPUPPCState *env, uint32_t opcode, + ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb) { - ppc_vsr_t *xt = &env->vsr[rD(opcode) + 32]; - ppc_vsr_t *xa = &env->vsr[rA(opcode) + 32]; - ppc_vsr_t *xb = &env->vsr[rB(opcode) + 32]; ppc_vsr_t t = *xt; float_status tstat; |