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authorNicholas Piggin <npiggin@gmail.com>2023-06-05 12:54:43 +1000
committerDaniel Henrique Barboza <danielhb413@gmail.com>2023-06-10 10:19:24 -0300
commit392d328abe7534a6e852151740913e2cd50426bc (patch)
tree3463b632508105e414561b71a2c51257e8ffd01c /target/ppc/cpu.h
parente025e8f5a8a7e32409bb4c7c509d752486113188 (diff)
target/ppc: Ensure stcx size matches larx
Differently-sized larx/stcx. pairs can succeed if the starting address matches. Add a check to require the size of stcx. exactly match the larx that established the reservation. Use the term "reserve_length" for this state, which matches the terminology used in the ISA. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20230605025445.161932-2-npiggin@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/cpu.h')
-rw-r--r--target/ppc/cpu.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index c7c2a5534c..20508bac5e 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1114,8 +1114,9 @@ struct CPUArchState {
target_ulong ov32;
target_ulong ca32;
- target_ulong reserve_addr; /* Reservation address */
- target_ulong reserve_val; /* Reservation value */
+ target_ulong reserve_addr; /* Reservation address */
+ target_ulong reserve_length; /* Reservation larx op size (bytes) */
+ target_ulong reserve_val; /* Reservation value */
target_ulong reserve_val2;
/* These are used in supervisor mode only */