diff options
author | Víctor Colombo <victor.colombo@eldorado.org.br> | 2022-05-04 18:05:23 -0300 |
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committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-05-05 15:36:17 -0300 |
commit | 1922322ce43091cfb004a4da8d5851b3630718f1 (patch) | |
tree | 8ee43d1b66e2f7d81c5afb6ec642b5d7b4b9d301 /target/ppc/cpu.h | |
parent | d41ccf6eea918ec121cd38eda6e2526b446013f4 (diff) |
target/ppc: Remove msr_le macro
msr_le macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-5-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/cpu.h')
-rw-r--r-- | target/ppc/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 8f1dc4cb15..c561d664de 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -355,6 +355,7 @@ typedef enum { #define MSR_LE 0 /* Little-endian mode 1 hflags */ FIELD(MSR, PR, MSR_PR, 1) +FIELD(MSR, LE, MSR_LE, 1) /* PMU bits */ #define MMCR0_FC PPC_BIT(32) /* Freeze Counters */ @@ -486,7 +487,6 @@ FIELD(MSR, PR, MSR_PR, 1) #define msr_ir ((env->msr >> MSR_IR) & 1) #define msr_dr ((env->msr >> MSR_DR) & 1) #define msr_ds ((env->msr >> MSR_DS) & 1) -#define msr_le ((env->msr >> MSR_LE) & 1) #define msr_ts ((env->msr >> MSR_TS1) & 3) #define DBCR0_ICMP (1 << 27) |