diff options
| author | Daniel Henrique Barboza <danielhb413@gmail.com> | 2021-12-17 17:57:18 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2021-12-17 17:57:18 +0100 |
| commit | 46d396bde988020528445691089711eb27b348b5 (patch) | |
| tree | d3bedbaffa6b7506d737e3b3b203bd2a7460ea0d /target/ppc/cpu.h | |
| parent | 1474ba6d100179c248fed6c67756814a6fa89432 (diff) | |
target/ppc: enable PMU instruction count
The PMU is already counting cycles by calculating time elapsed in
nanoseconds. Counting instructions is a different matter and requires
another approach.
This patch adds the capability of counting completed instructions (Perf
event PM_INST_CMPL) by counting the amount of instructions translated in
each translation block right before exiting it.
A new pmu_count_insns() helper in translation.c was added to do that.
After verifying that the PMU is counting instructions, call
helper_insns_inc(). This new helper from power8-pmu.c will add the
instructions to the relevant counters. It'll also be responsible for
triggering counter negative overflows as it is already being done with
cycles.
To verify whether the PMU is counting instructions or now, a new hflags
named 'HFLAGS_INSN_CNT' is introduced. This flag will match the internal
state of the PMU. We're be using this flag to avoid calling
helper_insn_inc() when we do not have a valid instruction event being
sampled.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20211201151734.654994-7-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc/cpu.h')
| -rw-r--r-- | target/ppc/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index cf637f0f6d..313b16f392 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -655,6 +655,7 @@ enum { HFLAGS_PR = 14, /* MSR_PR */ HFLAGS_PMCC0 = 15, /* MMCR0 PMCC bit 0 */ HFLAGS_PMCC1 = 16, /* MMCR0 PMCC bit 1 */ + HFLAGS_INSN_CNT = 17, /* PMU instruction count enabled */ HFLAGS_VSX = 23, /* MSR_VSX if cpu has VSX */ HFLAGS_VR = 25, /* MSR_VR if cpu has VRE */ |