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authorCédric Le Goater <clg@kaod.org>2019-12-05 19:44:50 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2019-12-17 10:39:48 +1100
commit7d37b274ffd382d1d9e46164eca557b5f87383aa (patch)
tree0c39f3d68884eede0f093dcebe78b281509bdecd /target/ppc/cpu.h
parent2b6dda81c327239af1643063d4c13a3134425710 (diff)
target/ppc: Add POWER10 DD1.0 model information
This includes in QEMU a new CPU model for the POWER10 processor with the same capabilities of a POWER9 process. The model will be extended when support is completed. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191205184454.10722-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/cpu.h')
-rw-r--r--target/ppc/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 60cf030ce6..fbec1b0cd5 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2364,6 +2364,7 @@ enum {
PCR_COMPAT_2_06 = PPC_BIT(61),
PCR_COMPAT_2_07 = PPC_BIT(60),
PCR_COMPAT_3_00 = PPC_BIT(59),
+ PCR_COMPAT_3_10 = PPC_BIT(58),
PCR_VEC_DIS = PPC_BIT(0), /* Vec. disable (bit NA since POWER8) */
PCR_VSX_DIS = PPC_BIT(1), /* VSX disable (bit NA since POWER8) */
PCR_TM_DIS = PPC_BIT(2), /* Trans. memory disable (POWER8) */