diff options
| author | Daniel Henrique Barboza <danielhb413@gmail.com> | 2021-10-17 22:01:21 -0300 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-10-21 11:42:47 +1100 |
| commit | 7b3ecf16c81c16eb3cf171b0bd63c08f1a5dd942 (patch) | |
| tree | 889a42b61387639eb2029bdc0c42c7836fd90a46 /target/ppc/cpu.h | |
| parent | 565cb1096733dae6d388244e03d60d680f6eca84 (diff) | |
target/ppc: add user read/write functions for MMCR2
Similar to the previous patch, let's add problem state read/write access to
the MMCR2 SPR, which is also a group A PMU SPR that needs to be filtered
to be read/written by userspace.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20211018010133.315842-4-danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/cpu.h')
| -rw-r--r-- | target/ppc/cpu.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 0bd008f4b8..0472ec9154 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -353,6 +353,15 @@ typedef struct ppc_v3_pate_t { #define MMCR0_PMCC1 PPC_BIT(45) /* PMC Control bit 1 */ /* MMCR0 userspace r/w mask */ #define MMCR0_UREG_MASK (MMCR0_FC | MMCR0_PMAO | MMCR0_PMAE) +/* MMCR2 userspace r/w mask */ +#define MMCR2_FC1P0 PPC_BIT(1) /* MMCR2 FCnP0 for PMC1 */ +#define MMCR2_FC2P0 PPC_BIT(10) /* MMCR2 FCnP0 for PMC2 */ +#define MMCR2_FC3P0 PPC_BIT(19) /* MMCR2 FCnP0 for PMC3 */ +#define MMCR2_FC4P0 PPC_BIT(28) /* MMCR2 FCnP0 for PMC4 */ +#define MMCR2_FC5P0 PPC_BIT(37) /* MMCR2 FCnP0 for PMC5 */ +#define MMCR2_FC6P0 PPC_BIT(46) /* MMCR2 FCnP0 for PMC6 */ +#define MMCR2_UREG_MASK (MMCR2_FC1P0 | MMCR2_FC2P0 | MMCR2_FC3P0 | \ + MMCR2_FC4P0 | MMCR2_FC5P0 | MMCR2_FC6P0) /* LPCR bits */ #define LPCR_VPM0 PPC_BIT(0) |