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authorStafford Horne <shorne@gmail.com>2022-06-12 18:59:34 +0900
committerStafford Horne <shorne@gmail.com>2022-09-04 07:02:56 +0100
commit0fd8a106efb6bc2e55b3e9629b106d13a7214570 (patch)
tree8be95e66612b64b611cb20fc9353797aa0470a88 /target/openrisc
parent7025114b1cd7683cb7fbef0810577c67aa3cbbd8 (diff)
target/openrisc: Fix memory reading in debugger
In commit f0655423ca ("target/openrisc: Reorg tlb lookup") data and instruction TLB reads were combined. This, broke debugger reads where we first tried to map using the data tlb then fall back to the instruction tlb. This patch replicates this logic by first requesting a PAGE_READ protection mapping then falling back to PAGE_EXEC. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'target/openrisc')
-rw-r--r--target/openrisc/mmu.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c
index d7e1320998..0b8afdbacf 100644
--- a/target/openrisc/mmu.c
+++ b/target/openrisc/mmu.c
@@ -148,7 +148,13 @@ hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
case SR_DME | SR_IME:
/* The mmu is definitely enabled. */
excp = get_phys_mmu(cpu, &phys_addr, &prot, addr,
- PAGE_EXEC | PAGE_READ | PAGE_WRITE,
+ PAGE_READ,
+ (sr & SR_SM) != 0);
+ if (!excp) {
+ return phys_addr;
+ }
+ excp = get_phys_mmu(cpu, &phys_addr, &prot, addr,
+ PAGE_EXEC,
(sr & SR_SM) != 0);
return excp ? -1 : phys_addr;