diff options
author | Alex Bennée <alex.bennee@linaro.org> | 2016-11-14 14:17:28 +0000 |
---|---|---|
committer | Alex Bennée <alex.bennee@linaro.org> | 2017-01-13 14:24:37 +0000 |
commit | d10eb08f5d8389c814b554d01aa2882ac58221bf (patch) | |
tree | e9b70aa2f4a03e951e2d0d847eacc8adff5de17b /target/openrisc | |
parent | ba7d3d1858c257e39b47f7f12fa2016ffd960b11 (diff) |
cputlb: drop flush_global flag from tlb_flush
We have never has the concept of global TLB entries which would avoid
the flush so we never actually use this flag. Drop it and make clear
that tlb_flush is the sledge-hammer it has always been.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
[DG: ppc portions]
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/openrisc')
-rw-r--r-- | target/openrisc/interrupt.c | 2 | ||||
-rw-r--r-- | target/openrisc/interrupt_helper.c | 2 | ||||
-rw-r--r-- | target/openrisc/sys_helper.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/target/openrisc/interrupt.c b/target/openrisc/interrupt.c index 5fe3f11ffc..e43fc84ef7 100644 --- a/target/openrisc/interrupt.c +++ b/target/openrisc/interrupt.c @@ -45,7 +45,7 @@ void openrisc_cpu_do_interrupt(CPUState *cs) /* For machine-state changed between user-mode and supervisor mode, we need flush TLB when we enter&exit EXCP. */ - tlb_flush(cs, 1); + tlb_flush(cs); env->esr = env->sr; env->sr &= ~SR_DME; diff --git a/target/openrisc/interrupt_helper.c b/target/openrisc/interrupt_helper.c index 116f9109a7..0ed5146e8d 100644 --- a/target/openrisc/interrupt_helper.c +++ b/target/openrisc/interrupt_helper.c @@ -53,7 +53,7 @@ void HELPER(rfe)(CPUOpenRISCState *env) } if (need_flush_tlb) { - tlb_flush(cs, 1); + tlb_flush(cs); } #endif cs->interrupt_request |= CPU_INTERRUPT_EXITTB; diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index a719e452be..daea902856 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -47,7 +47,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, case TO_SPR(0, 17): /* SR */ if ((env->sr & (SR_IME | SR_DME | SR_SM)) ^ (rb & (SR_IME | SR_DME | SR_SM))) { - tlb_flush(cs, 1); + tlb_flush(cs); } env->sr = rb; env->sr |= SR_FO; /* FO is const equal to 1 */ |