diff options
| author | Ilya Leoshkevich <iii@linux.ibm.com> | 2021-08-09 12:32:59 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-09-14 12:00:20 -0700 |
| commit | 4e116893c6079b51efdc9e226be3f1a530f47f5e (patch) | |
| tree | dd83c64b73a5a2da8e7eb51b18604f5888ee95a1 /target/openrisc/translate.c | |
| parent | 4c9af1ea1457782cf0adb293179335ef6de942aa (diff) | |
accel/tcg: Add DisasContextBase argument to translator_ld*
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
[rth: Split out of a larger patch.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/openrisc/translate.c')
| -rw-r--r-- | target/openrisc/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index d6ea536744..5f3d430245 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -1613,7 +1613,7 @@ static void openrisc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc = container_of(dcbase, DisasContext, base); OpenRISCCPU *cpu = OPENRISC_CPU(cs); - uint32_t insn = translator_ldl(&cpu->env, dc->base.pc_next); + uint32_t insn = translator_ldl(&cpu->env, &dc->base, dc->base.pc_next); if (!decode(dc, insn)) { gen_illegal_exception(dc); |