diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-22 19:51:00 -0700 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2018-07-03 00:05:28 +0900 |
| commit | b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056 (patch) | |
| tree | 15dba503a0704eca2b64bf8b77e7621bcd3208b5 /target/openrisc/translate.c | |
| parent | fffde6695f4be3cf484f068f24e894280d7360ea (diff) | |
target/openrisc: Fix cpu_mmu_index
The code in cpu_mmu_index does not properly honor SR_DME.
This bug has workarounds elsewhere in that we flush the
tlb more often than necessary, on the state changes that
should be reflected in a change of mmu_index.
Fixing this means that we can respect the mmu_index that
is given to tlb_flush.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'target/openrisc/translate.c')
| -rw-r--r-- | target/openrisc/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 64b5e84630..a271cd3903 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -55,7 +55,7 @@ static inline bool is_user(DisasContext *dc) #ifdef CONFIG_USER_ONLY return true; #else - return dc->mem_idx == MMU_USER_IDX; + return !(dc->tb_flags & TB_FLAGS_SM); #endif } |