diff options
| author | Richard Henderson <rth@twiddle.net> | 2016-04-05 11:41:48 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-02-14 08:15:00 +1100 |
| commit | 24c328521b19aff2559118809ddf0522d6dfaaea (patch) | |
| tree | d8bd63c5a682fbc3aeb9d019195059928c482477 /target/openrisc/interrupt_helper.c | |
| parent | a8000cb480c8cfb612b039bf0382c41b9d6c7d45 (diff) | |
target/openrisc: Tidy ppc/npc implementation
The NPC SPR is really only supposed to be used for FPGA debugging.
It contains the same contents as PC, unless one plays games. Follow
the or1ksim implementation in flushing delayed branch state when it
is changed.
The PPC SPR need not be updated every instruction, merely when we
exit the TB or attempt to read its contents.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/openrisc/interrupt_helper.c')
| -rw-r--r-- | target/openrisc/interrupt_helper.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/openrisc/interrupt_helper.c b/target/openrisc/interrupt_helper.c index c7fa97a565..56620e0571 100644 --- a/target/openrisc/interrupt_helper.c +++ b/target/openrisc/interrupt_helper.c @@ -32,7 +32,6 @@ void HELPER(rfe)(CPUOpenRISCState *env) (cpu->env.esr & (SR_SM | SR_IME | SR_DME)); #endif cpu->env.pc = cpu->env.epcr; - cpu->env.npc = cpu->env.epcr; cpu_set_sr(&cpu->env, cpu->env.esr); cpu->env.lock_addr = -1; |