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authorRichard Henderson <richard.henderson@linaro.org>2018-05-22 16:51:19 -0700
committerStafford Horne <shorne@gmail.com>2018-07-03 00:05:28 +0900
commit23d45ebdb198378ae580c98ac898aa4b615059fd (patch)
tree4463196c531f9677f1436f0c80132b1086642a19 /target/openrisc/cpu.h
parent455d45d22cc3b2c29c7840f2478647a0a3d9d8b4 (diff)
target/openrisc: Remove indirect function calls for mmu
There is no reason to use an indirect branch instead of simply testing the SR bits that control mmu state. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'target/openrisc/cpu.h')
-rw-r--r--target/openrisc/cpu.h11
1 files changed, 0 insertions, 11 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 96b7f58659..a27adad085 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -379,17 +379,6 @@ void cpu_openrisc_count_update(OpenRISCCPU *cpu);
void cpu_openrisc_timer_update(OpenRISCCPU *cpu);
void cpu_openrisc_count_start(OpenRISCCPU *cpu);
void cpu_openrisc_count_stop(OpenRISCCPU *cpu);
-
-void cpu_openrisc_mmu_init(OpenRISCCPU *cpu);
-int cpu_openrisc_get_phys_nommu(OpenRISCCPU *cpu,
- hwaddr *physical,
- int *prot, target_ulong address, int rw);
-int cpu_openrisc_get_phys_code(OpenRISCCPU *cpu,
- hwaddr *physical,
- int *prot, target_ulong address, int rw);
-int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
- hwaddr *physical,
- int *prot, target_ulong address, int rw);
#endif
#define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU