diff options
| author | Richard Henderson <rth@twiddle.net> | 2016-04-05 19:43:40 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-02-14 08:15:00 +1100 |
| commit | 6597c28d618a3d16d468770b7c30a0237a8c8ea9 (patch) | |
| tree | 45f88af4cf649ce36afadd421965ae88d5173ea6 /target/openrisc/cpu.h | |
| parent | a01deb36a685365b4a3117112da3cc4f0f79e955 (diff) | |
target/openrisc: Optimize for r0 being zero
The HW does not special-case r0, but the ABI specifies that r0 should
contain 0. If we expose this fact to the optimizer, we can simplify
a lot of the generated code. We must of course verify that r0==0, but
that is trivial to do with a TB flag.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/openrisc/cpu.h')
| -rw-r--r-- | target/openrisc/cpu.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 50a36ba8ef..418a0e6960 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -389,6 +389,7 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu, #include "exec/cpu-all.h" #define TB_FLAGS_DFLAG 1 +#define TB_FLAGS_R0_0 2 #define TB_FLAGS_OVE SR_OVE static inline void cpu_get_tb_cpu_state(CPUOpenRISCState *env, @@ -397,7 +398,9 @@ static inline void cpu_get_tb_cpu_state(CPUOpenRISCState *env, { *pc = env->pc; *cs_base = 0; - *flags = env->dflag | (env->sr & SR_OVE); + *flags = (env->dflag + | (env->gpr[0] == 0 ? TB_FLAGS_R0_0 : 0) + | (env->sr & SR_OVE)); } static inline int cpu_mmu_index(CPUOpenRISCState *env, bool ifetch) |