diff options
| author | Stafford Horne <shorne@gmail.com> | 2017-04-22 00:28:55 +0900 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2017-05-04 09:39:14 +0900 |
| commit | 48a1b62baaf45e4d8d5ffac77647f7e898d7f7f1 (patch) | |
| tree | 6cf8192766c87b6cdf623f6b38cdff207c9902b0 /target/openrisc/cpu.c | |
| parent | acf57591c01cd0b1667e4f0ed2176d59cb5827aa (diff) | |
target/openrisc: Remove duplicate features property
The features property has stored the exact same thing as the cpucfgr
spr. Remove the feature enum and property as it is not needed.
In order to preserve the behavior or keeping features accross reset this
patch moves cpucfgr into the non reset region of the state struct. Since
the cpucfgr is read only this means we only need to sset cpucfgr once
during class init.
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'target/openrisc/cpu.c')
| -rw-r--r-- | target/openrisc/cpu.c | 17 |
1 files changed, 3 insertions, 14 deletions
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 6c1ed07c16..c9b3f2260e 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -52,7 +52,6 @@ static void openrisc_cpu_reset(CPUState *s) s->exception_index = -1; cpu->env.upr = UPR_UP | UPR_DMP | UPR_IMP | UPR_PICP | UPR_TTP; - cpu->env.cpucfgr = CPUCFGR_OB32S | CPUCFGR_OF32S | CPUCFGR_NSGF; cpu->env.dmmucfgr = (DMMUCFGR_NTW & (0 << 2)) | (DMMUCFGR_NTS & (6 << 2)); cpu->env.immucfgr = (IMMUCFGR_NTW & (0 << 2)) | (IMMUCFGR_NTS & (6 << 2)); @@ -65,12 +64,6 @@ static void openrisc_cpu_reset(CPUState *s) #endif } -static inline void set_feature(OpenRISCCPU *cpu, int feature) -{ - cpu->feature |= feature; - cpu->env.cpucfgr = cpu->feature; -} - static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); @@ -132,19 +125,15 @@ static void or1200_initfn(Object *obj) { OpenRISCCPU *cpu = OPENRISC_CPU(obj); - set_feature(cpu, OPENRISC_FEATURE_NSGF); - set_feature(cpu, OPENRISC_FEATURE_OB32S); - set_feature(cpu, OPENRISC_FEATURE_OF32S); - set_feature(cpu, OPENRISC_FEATURE_EVBAR); + cpu->env.cpucfgr = CPUCFGR_NSGF | CPUCFGR_OB32S | CPUCFGR_OF32S | + CPUCFGR_EVBARP; } static void openrisc_any_initfn(Object *obj) { OpenRISCCPU *cpu = OPENRISC_CPU(obj); - set_feature(cpu, OPENRISC_FEATURE_NSGF); - set_feature(cpu, OPENRISC_FEATURE_OB32S); - set_feature(cpu, OPENRISC_FEATURE_EVBAR); + cpu->env.cpucfgr = CPUCFGR_NSGF | CPUCFGR_OB32S | CPUCFGR_EVBARP; } typedef struct OpenRISCCPUInfo { |