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authorRichard Henderson <richard.henderson@linaro.org>2021-06-28 14:20:55 -0700
committerRichard Henderson <richard.henderson@linaro.org>2021-06-29 10:03:11 -0700
commit77b42a2d53e27144451ca9b5de628bfe86edde1b (patch)
tree5fc9314c911cbe1c3434a8f7c7179005fdd48bd1 /target/nios2
parent1ff375d743724d4a31b6cebcf97961e24645eb71 (diff)
target/nios2: Use pc_next for pc + 4
We have pre-computed the next instruction address into dc->base.pc_next, so we might as well use it. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/nios2')
-rw-r--r--target/nios2/translate.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index abc7e5f96a..930f3d3395 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -211,7 +211,7 @@ static void jmpi(DisasContext *dc, uint32_t code, uint32_t flags)
static void call(DisasContext *dc, uint32_t code, uint32_t flags)
{
- tcg_gen_movi_tl(cpu_R[R_RA], dc->pc + 4);
+ tcg_gen_movi_tl(cpu_R[R_RA], dc->base.pc_next);
jmpi(dc, code, flags);
}
@@ -265,7 +265,7 @@ static void br(DisasContext *dc, uint32_t code, uint32_t flags)
{
I_TYPE(instr, code);
- gen_goto_tb(dc, 0, dc->pc + 4 + (instr.imm16.s & -4));
+ gen_goto_tb(dc, 0, dc->base.pc_next + (instr.imm16.s & -4));
dc->base.is_jmp = DISAS_NORETURN;
}
@@ -275,9 +275,9 @@ static void gen_bxx(DisasContext *dc, uint32_t code, uint32_t flags)
TCGLabel *l1 = gen_new_label();
tcg_gen_brcond_tl(flags, cpu_R[instr.a], cpu_R[instr.b], l1);
- gen_goto_tb(dc, 0, dc->pc + 4);
+ gen_goto_tb(dc, 0, dc->base.pc_next);
gen_set_label(l1);
- gen_goto_tb(dc, 1, dc->pc + 4 + (instr.imm16.s & -4));
+ gen_goto_tb(dc, 1, dc->base.pc_next + (instr.imm16.s & -4));
dc->base.is_jmp = DISAS_NORETURN;
}
@@ -435,7 +435,7 @@ static void nextpc(DisasContext *dc, uint32_t code, uint32_t flags)
R_TYPE(instr, code);
if (likely(instr.c != R_ZERO)) {
- tcg_gen_movi_tl(cpu_R[instr.c], dc->pc + 4);
+ tcg_gen_movi_tl(cpu_R[instr.c], dc->base.pc_next);
}
}
@@ -448,7 +448,7 @@ static void callr(DisasContext *dc, uint32_t code, uint32_t flags)
R_TYPE(instr, code);
tcg_gen_mov_tl(cpu_R[R_PC], load_gpr(dc, instr.a));
- tcg_gen_movi_tl(cpu_R[R_RA], dc->pc + 4);
+ tcg_gen_movi_tl(cpu_R[R_RA], dc->base.pc_next);
dc->base.is_jmp = DISAS_JUMP;
}