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authorWentong Wu <wentong.wu@intel.com>2020-07-13 14:36:10 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-07-13 14:36:10 +0100
commitc7694535718273c5a38c18a0f08e48509ba26e38 (patch)
tree792236adddad9f95a2f811af4c872685453c68ed /target/nios2
parent42928f2c9cd6185e3bda5e214f5c8f3603125ba9 (diff)
target/nios2: in line the semantics of DISAS_UPDATE with other targets
In line the semantics of DISAS_UPDATE on nios2 target with other targets which is to explicitly write the PC back into the cpu state before doing a tcg_gen_exit_tb(). Signed-off-by: Wentong Wu <wentong.wu@intel.com> Message-id: 20200710233433.19729-2-wentong.wu@intel.com Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/nios2')
-rw-r--r--target/nios2/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 00b591cc29..c2a134f932 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -865,6 +865,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
/* Indicate where the next block should start */
switch (dc->is_jmp) {
case DISAS_NEXT:
+ case DISAS_UPDATE:
/* Save the current PC back into the CPU register */
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
tcg_gen_exit_tb(NULL, 0);
@@ -872,7 +873,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
default:
case DISAS_JUMP:
- case DISAS_UPDATE:
/* The jump will already have updated the PC register */
tcg_gen_exit_tb(NULL, 0);
break;