diff options
| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-09-14 11:02:41 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-11-07 12:13:28 +0100 |
| commit | 18f86aecd6a1bea0f78af14587a684ad966d8d3a (patch) | |
| tree | 9cc1b7f8067a96c6bdc20b851c8a804363574248 /target/mips | |
| parent | 04591b3ddd9a96b9298a1dd437a6464ab55e62ee (diff) | |
target/mips: Fix TX79 LQ/SQ opcodes
The base register address offset is *signed*.
Cc: qemu-stable@nongnu.org
Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914090447.12557-1-philmd@linaro.org>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/tcg/tx79.decode | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/tcg/tx79.decode b/target/mips/tcg/tx79.decode index 57d87a2076..578b8c54c0 100644 --- a/target/mips/tcg/tx79.decode +++ b/target/mips/tcg/tx79.decode @@ -24,7 +24,7 @@ @rs ...... rs:5 ..... .......... ...... &r sa=0 rt=0 rd=0 @rd ...... .......... rd:5 ..... ...... &r sa=0 rs=0 rt=0 -@ldst ...... base:5 rt:5 offset:16 &i +@ldst ...... base:5 rt:5 offset:s16 &i ########################################################################### |