diff options
| author | Aleksandar Markovic <amarkovic@wavecomp.com> | 2018-10-30 18:28:14 +0100 |
|---|---|---|
| committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2018-11-17 19:29:34 +0100 |
| commit | c8341e00007f51e777b8b00b3fc3f475b3684001 (patch) | |
| tree | 03d5bda907321c16f44ed6e9ea2edc6413cc0bb0 /target/mips | |
| parent | 992e8176d36882983bb04f0259f7151a36d003a1 (diff) | |
target/mips: Rename MMI-related masks
Rename MMI-related masks.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/translate.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 714f2e6be4..12591c19a5 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2201,7 +2201,7 @@ enum { * 7 111 | * | * | * | * | PSLLW | * | PSRLW | PSRAW */ -#define MASK_TX79_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F)) +#define MASK_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F)) enum { TX79_MMI_MADD = 0x00 | TX79_CLASS_MMI, /* Same as OPC_MADD */ TX79_MMI_MADDU = 0x01 | TX79_CLASS_MMI, /* Same as OPC_MADDU */ @@ -2252,7 +2252,7 @@ enum { * 7 111 | * | * | PEXT5 | PPAC5 */ -#define MASK_TX79_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +#define MASK_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) enum { TX79_MMI0_PADDW = (0x00 << 6) | TX79_MMI_CLASS_MMI0, TX79_MMI0_PSUBW = (0x01 << 6) | TX79_MMI_CLASS_MMI0, @@ -2303,7 +2303,7 @@ enum { * 7 111 | * | * | * | * */ -#define MASK_TX79_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +#define MASK_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) enum { TX79_MMI1_PABSW = (0x01 << 6) | TX79_MMI_CLASS_MMI1, TX79_MMI1_PCEQW = (0x02 << 6) | TX79_MMI_CLASS_MMI1, @@ -2347,7 +2347,7 @@ enum { * 7 111 | PMULTH| PDIVBW| PEXEW | PROT3W */ -#define MASK_TX79_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +#define MASK_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) enum { TX79_MMI2_PMADDW = (0x00 << 6) | TX79_MMI_CLASS_MMI2, TX79_MMI2_PSLLVW = (0x02 << 6) | TX79_MMI_CLASS_MMI2, @@ -2395,7 +2395,7 @@ enum { * 7 111 | * | * | PEXCW | * */ -#define MASK_TX79_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +#define MASK_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) enum { TX79_MMI3_PMADDUW = (0x00 << 6) | TX79_MMI_CLASS_MMI3, TX79_MMI3_PSRAVW = (0x03 << 6) | TX79_MMI_CLASS_MMI3, @@ -26466,7 +26466,7 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx) static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx) { - uint32_t opc = MASK_TX79_MMI0(ctx->opcode); + uint32_t opc = MASK_MMI0(ctx->opcode); switch (opc) { case TX79_MMI0_PADDW: /* TODO: TX79_MMI0_PADDW */ @@ -26505,7 +26505,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx) static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx) { - uint32_t opc = MASK_TX79_MMI1(ctx->opcode); + uint32_t opc = MASK_MMI1(ctx->opcode); switch (opc) { case TX79_MMI1_PABSW: /* TODO: TX79_MMI1_PABSW */ @@ -26537,7 +26537,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx) static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx) { - uint32_t opc = MASK_TX79_MMI2(ctx->opcode); + uint32_t opc = MASK_MMI2(ctx->opcode); switch (opc) { case TX79_MMI2_PMADDW: /* TODO: TX79_MMI2_PMADDW */ @@ -26573,7 +26573,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx) static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx) { - uint32_t opc = MASK_TX79_MMI3(ctx->opcode); + uint32_t opc = MASK_MMI3(ctx->opcode); switch (opc) { case TX79_MMI3_PMADDUW: /* TODO: TX79_MMI3_PMADDUW */ @@ -26600,7 +26600,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx) static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { - uint32_t opc = MASK_TX79_MMI(ctx->opcode); + uint32_t opc = MASK_MMI(ctx->opcode); int rs = extract32(ctx->opcode, 21, 5); int rt = extract32(ctx->opcode, 16, 5); int rd = extract32(ctx->opcode, 11, 5); |