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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-07-31 15:23:47 +0200
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-08-25 13:00:43 +0200
commit4919f69c658be36c97d63660bd41377b06ea6822 (patch)
treef1b3379375cd68cf41bc3ea723ce50421dad3543 /target/mips
parent2e176eaf9c54a23ea2f37ccbeef2045f422b0e30 (diff)
target/mips: Decode vendor extensions before MIPS ISAs
In commit ffc672aa977 ("target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree") we misplaced the decoder call. Move it to the correct place. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210801234202.3167676-3-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/tcg/translate.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 6b95cca052..490add3fc1 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -16094,6 +16094,11 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
/* Transition to the auto-generated decoder. */
+ /* Vendor specific extensions */
+ if (cpu_supports_isa(env, INSN_R5900) && decode_ext_txx9(ctx, ctx->opcode)) {
+ return;
+ }
+
/* ISA extensions */
if (ase_msa_available(env) && decode_ase_msa(ctx, ctx->opcode)) {
return;
@@ -16103,9 +16108,6 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
if (cpu_supports_isa(env, ISA_MIPS_R6) && decode_isa_rel6(ctx, ctx->opcode)) {
return;
}
- if (cpu_supports_isa(env, INSN_R5900) && decode_ext_txx9(ctx, ctx->opcode)) {
- return;
- }
if (decode_opc_legacy(env, ctx)) {
return;