diff options
| author | Aleksandar Rikalo <Aleksandar.Rikalo@syrmia.com> | 2021-06-15 17:22:35 +0000 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-06-24 16:48:08 +0200 |
| commit | e5e6f00c3154055dba99eb3b789c38dc70578111 (patch) | |
| tree | d6d74f9d356e6dd4fc3dcce1724bf1456109e092 /target/mips | |
| parent | 916e957070e1f4b697c905d0a35984e70f106ed6 (diff) | |
target/mips: fix emulation of nanoMIPS BPOSGE32 instruction
Per the "MIPS® Architecture Extension: nanoMIPS32 DSP Technical
Reference Manual — Revision 0.04" p. 88 "BPOSGE32C", offset argument (imm)
should be left-shifted first.
This change was tested against test_dsp_r1_bposge32.c DSP test.
Reported-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Signed-off-by: Filip Vidojevic <filip.vidojevic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <VI1PR0302MB34869449EE56F226FC3C21129C309@VI1PR0302MB3486.eurprd03.prod.outlook.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/tcg/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 1ff0b098bc..d248b5e5d2 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -21137,7 +21137,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx) extract32(ctx->opcode, 0, 1) << 13; gen_compute_branch_nm(ctx, OPC_BPOSGE32, 4, -1, -2, - imm); + imm << 1); } break; default: |