aboutsummaryrefslogtreecommitdiff
path: root/target/mips
diff options
context:
space:
mode:
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-12-06 20:29:00 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-12-13 19:58:54 +0100
commit2fd9c5ad4449c862932b21e8f6b4573cc50b9ae8 (patch)
tree44ea62b782d76e76685ad82d98701a05ec4be8b0 /target/mips
parentdf6adb68c1b1808f164c9ed8a04fe14d9c04e82c (diff)
hw/mips: Move address translation helpers to target/mips/
Address translation is an architectural thing (not hardware related). Move the helpers from hw/ to target/. As physical address and KVM are specific to system mode emulation, restrict this file to softmmu, so it doesn't get compiled for user-mode emulation. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201206233949.3783184-2-f4bug@amsat.org>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/addr.c51
-rw-r--r--target/mips/cpu.h8
-rw-r--r--target/mips/meson.build1
-rw-r--r--target/mips/translate.c2
4 files changed, 60 insertions, 2 deletions
diff --git a/target/mips/addr.c b/target/mips/addr.c
new file mode 100644
index 0000000000..27a6036c45
--- /dev/null
+++ b/target/mips/addr.c
@@ -0,0 +1,51 @@
+/*
+ * QEMU MIPS address translation support
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+
+static int mips_um_ksegs;
+
+uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr)
+{
+ return addr & 0x1fffffffll;
+}
+
+uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr)
+{
+ return addr | ~0x7fffffffll;
+}
+
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr)
+{
+ return addr | 0x40000000ll;
+}
+
+bool mips_um_ksegs_enabled(void)
+{
+ return mips_um_ksegs;
+}
+
+void mips_um_ksegs_enable(void)
+{
+ mips_um_ksegs = 1;
+}
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index e8bca75f23..5d3b2a01c0 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1291,6 +1291,14 @@ bool cpu_supports_isa(const CPUMIPSState *env, uint64_t isa_mask);
bool cpu_type_supports_isa(const char *cpu_type, uint64_t isa);
void cpu_set_exception_base(int vp_index, target_ulong address);
+/* addr.c */
+uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
+uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
+
+uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
+bool mips_um_ksegs_enabled(void);
+void mips_um_ksegs_enable(void);
+
/* mips_int.c */
void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level);
diff --git a/target/mips/meson.build b/target/mips/meson.build
index 681a5524c0..4179395a8e 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -14,6 +14,7 @@ mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
mips_softmmu_ss = ss.source_set()
mips_softmmu_ss.add(files(
+ 'addr.c',
'cp0_helper.c',
'cp0_timer.c',
'machine.c',
diff --git a/target/mips/translate.c b/target/mips/translate.c
index b8ed16bb77..4a1ae73f9d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28,8 +28,6 @@
#include "exec/exec-all.h"
#include "tcg/tcg-op.h"
#include "exec/cpu_ldst.h"
-#include "hw/mips/cpudevs.h"
-
#include "exec/helper-proto.h"
#include "exec/helper-gen.h"
#include "hw/semihosting/semihost.h"